Semiconductor failure analysis investigates why a semiconductor device or package has failed to meet its functional or parametric requirements (such as specified limits for leakage current, threshold voltage, or breakdown voltage). It combines electrical testing, fault localization, and materials characterization to move from the failure mode toward the failure mechanism and root cause.
That task is becoming more challenging as devices and packages incorporate smaller features, more deeply buried structures, and higher levels of integration. As a result, failure-analysis investigations increasingly depend on the careful selection and combination of techniques.
This article explains what semiconductor failure analysis is, what common techniques reveal, and how analytical evidence is interpreted to identify the failure mechanism and root cause.
Key takeaways
- Semiconductor failure analysis links the failure mode to the failure site, failure mechanism, and root cause.
- Investigations generally start non-destructively and progress to more invasive, higher-resolution methods as needed.
- Root-cause conclusions rely on correlating evidence from multiple techniques and separating established findings from interpretation.
What Is Semiconductor Failure Analysis?
Semiconductor failure analysis begins with a practical question: how does the device or package differ from what was expected?
That difference can appear as a complete loss of function or one or more electrical parameters falling outside specification. The abnormal behavior can be continuous or emerge only under particular temperatures, voltages, loads, or operating conditions.
Electrical testing helps define how the device is failing. Further analysis is then needed to locate the associated failure site and identify the failure mechanism responsible.
Four core concepts are useful here: failure mode, failure site, failure mechanism and root cause.
| Term | Meaning |
| Failure mode | The observable way in which the device fails or behaves abnormally |
| Failure site | The physical location where the failure is localized or associated damage is found |
| Failure mechanism | The physical, chemical, mechanical, or electrical process by which the device degraded, or a defect formed or progressed |
| Root cause | The underlying condition or event that allowed the mechanism to occur |
In this example of a die-attach related failure in a packaged CMOS device, the causal chain is:
- Failure mode: increased thermal resistance and elevated junction temperature
- Failure site: die-attach interface, with cracking and delamination
- Failure mechanism: thermomechanical fatigue during thermal cycling
- Possible root cause: contamination at the die-attach interface
The example is simplified to define the terms; in practice, more than one mechanism or root cause may need to be considered and tested against the available evidence. Not every failure produces discrete, visible damage at the failure site; some mechanisms primarily alter the device’s electrical behavior or material state.
Failure history can also help frame the FA plan. Extrinsic failures associated with manufacturing defects, contamination, or process variation often appear as early-life failures, whereas intrinsic degradation mechanisms are more commonly associated with wear-out after accumulated time or stress. The distinction is not absolute, but it can help guide the initial investigation.
Distinguishing the failure site from the mechanism and root cause matters because corrective action should address the cause, not only the damage found at the failure site. If contamination were confirmed, the response might involve tighter material-handling and process controls rather than simply replacing failed devices.
Semiconductor failure analysis is used throughout the product lifecycle, from development and manufacturing to the investigation of qualification failures and field returns. Common triggers include unexpected electrical behavior, a suspected physical anomaly, declining yield, or performance that deteriorates during testing or use.
What Do Common Semiconductor Failure Analysis Techniques Reveal?
Different semiconductor failure-analysis techniques answer different questions. Some define the failure mode, while others help localize the fault or reveal physical, chemical, or structural evidence. No single technique usually explains the entire failure. Table 2 shows how common methods contribute different parts of the evidence needed to link a failure mode to a failure site, failure mechanism, and, where possible, root cause.
| Analytical question | Representative techniques | What they can reveal | Important limitation |
| How is the device failing? | Parametric and functional electrical testing | Leakage, opens, shorts, altered thresholds, or abnormal electrical behavior | Can confirm the failure mode without locating the failure site |
| Where is the failure site? | Emission microscopy (EMMI)1, OBIRCH1, lock-in thermography (LIT)1,2, and magnetic microscopy1 | Leakage paths, local heating, abnormal current flow, or active failing regions | Signals can be weak or spatially broader than the underlying defect |
| Is there a buried package defect? | X-ray imaging, X-ray microscopy (XRM)2, X-ray computed tomography, and scanning acoustic microscopy | Voids, broken interconnects, die misalignment, cracks, and delamination | Detectability depends on feature size, material stack, and instrument resolution |
| What physical features are present at the failure site? | Optical microscopy, SEM, and FIB-SEM | Cracks, voids, corrosion, residues, film discontinuities, and damaged interfaces | Morphology alone does not establish composition or cause |
| Which elements are present? | EDS | Local elemental composition, including unexpected particles or deposits | Trace sensitivity and chemical-state information are limited |
| What is the nanoscale structure? | TEM and STEM, with electron diffraction where needed | Interfaces, crystal defects, reaction layers, and nanoscale voids | Requires destructive preparation and samples a very small region |
| What surface or depth-related chemical changes occurred? | XPS, Auger electron spectroscopy, and ToF-SIMS | Surface chemistry, oxidation, contamination, diffusion, and dopant or impurity profiles | Analysis is surface-sensitive, and depth profiling can be matrix-dependent or destructive |
| Has the structural state or stress changed? | Raman spectroscopy and XRD | Stress, phase, crystallinity, and lattice strain | Sensitivity to small, localized changes depends on the method and measurement scale |
2 Technique expected to be available soon.
Table 2. Common semiconductor failure-analysis techniques and the questions they answer
Technique selection depends on the analytical question, the likely fault location, and the scale at which the fault must be examined.
Electrical testing can reveal abnormal leakage, while fault-localization methods such as emission microscopy or lock-in thermography help identify its source. Once a region of interest has been identified, cross-section preparation can expose buried features for examination by microscopy or elemental analysis, helping determine how the defect formed.
Because different defects can produce similar failure modes, results from electrical testing, fault localization, and materials characterization must often be correlated before a failure mechanism can be identified.
Covalent can help coordinate semiconductor failure analysis, specialized sample preparation, and materials characterization, allowing the analytical approach to be tailored to the sample and failure problem.
How Does a Semiconductor Failure Analysis Investigation Proceed?
A semiconductor failure-analysis investigation usually begins by confirming the reported failure and the test conditions under which it occurs. An early step is to classify the problem as functional, parametric, or both. Table 3 summarizes the distinction.
| Aspect | Functional failure | Parametric failure |
| Basic meaning | Incorrect or missing operation | One or more electrical parameters outside specification |
| Typical examples | Logic, timing, or switching faults | Leakage, threshold shift, resistance, current, or breakdown changes |
| Common ways to confirm | Functional electrical testing, often with automated test equipment | Parametric electrical testing, such as curve tracing and capacitance-voltage measurements |
Failure analysis planning can also consider how failures develop over time and across a population of devices.
Once the failure mode is confirmed, the investigation considers where the fault is located, for example, in the active device region, on-die interconnects, or the package.
More broadly, Covalent follows this overall failure-analysis process:
- Define the problem.
- Gather background and service history.
- Examine non-destructively.
- Examine destructively.
- Analyze chemistry and microstructure.
- Synthesize root cause and corrective action
Figure 2 shows how this approach is implemented through progressive technique escalation. The workflow begins with fault isolation and coarse non-destructive examination before moving, as needed, to partial or full destructive preparation and higher-resolution imaging, microscopy, and spectroscopy.
The investigation generally begins with the least invasive methods possible. Fault isolation and non-destructive examination, such as X-ray or acoustic imaging, can identify the likely failing region, reveal structural anomalies, and guide the choice of section plane or preparation site before destructive analysis is undertaken.
For example, electrical testing can narrow an intermittent failure to a suspect connection or structure. X-ray imaging can then reveal a hidden broken interconnect, void, crack, or misalignment. Even a negative result can refine the working hypothesis and guide the next step.
Targeted preparation options include decapsulation to expose the die and internal package structures, or deprocessing to remove overlying device layers and reach a feature within the die. The method must preserve the feature of interest for subsequent analysis.
The purpose of an FA investigation is not only to explain why a device failed but also to support the next engineering decision. The findings can guide a process correction or help determine whether other devices are at risk.
How Is Failure Analysis Evidence Interpreted To Identify Failure Mechanism And Root Cause?
Analytical techniques produce evidence, but individual findings do not automatically establish root cause. An abnormal thermal hotspot can localize a region of interest, while cross-sectional microscopy can reveal a crack or void at that location. Failure-analysis specialists must still determine whether the physical feature caused the electrical failure, was a consequence of it, or is unrelated.
For a proposed explanation to be credible, each link in the causal chain must be consistent. The electrical signature should lead to the suspected failure site, the defect morphology should support the proposed mechanism, and the device history should explain how the failure developed. Reference parts, process records, or targeted follow-up analysis may be needed to distinguish between competing explanations. FA specialists must also consider sample-preparation artifacts that could alter or obscure evidence.
The CMOS device example in Table 4 shows how findings from different stages can be connected.
| Failure mode | Evidence gathered | Possible failure mechanism | Possible root causes or contributing conditions | Decision supported |
| Leakage current | TEM image revealing crack in the gate region of a CMOS device | Crack disrupting gate continuity, leading to leakage. | Thermal stress from post-deposition annealing with neighboring materials expanding at different rates, or mechanical stress introduced during chemical-mechanical planarization (CMP) or later packaging steps. | Review annealing/CMP processes for thermal expansion and stress. |
Figure 4 shows an example of evidence gathered during the failure analysis of a CMOS device exhibiting leakage current
No single finding necessarily proves the cause. The strongest conclusions are supported by independent, consistent evidence, while alternative explanations and remaining uncertainties are made clear. Failure analysis aims to provide an explanation strong enough to support the next engineering decision.
For customer-specific problems, Covalent can help correlate the available evidence and translate its implications into practical next steps.
Why Do Advanced Devices And Packages Often Require Combined Failure Analysis Techniques?
Advanced semiconductor devices and packages make failure analysis more challenging because the failing regions can be smaller, more deeply buried, and located within structures containing more material interfaces than in earlier device generations. Failures can also arise from interactions among the device, interconnects, and package rather than from a single visible defect.
When a localized region contains several closely spaced structures, complementary techniques can help identify the affected feature and establish the nature of the defect.
Gathering and interpreting the evidence also becomes more difficult. Nanoscale defects can produce weak signals or be difficult to distinguish from nearby features. Investigating these defects may require higher-resolution analysis, more precise sample preparation, and repeated examination at different scales. These additional steps can extend the investigation and increase its cost. Delays in identifying the failure mechanism can also slow yield learning or qualification decisions.
Turning Failure Analysis Evidence Into The Next Decision
Semiconductor failure analysis turns a failed or anomalous device into evidence that can support the next technical decision. Electrical testing can define the failure mode, but root-cause understanding depends on linking that failure mode to the failure site, the failure mechanism, and the underlying condition that allowed the failure to occur.
As devices and packages become smaller, more integrated, and more complex, gathering and interpreting that evidence requires greater care. The goal is actionable insight: not only what failed, but why it failed and what can be changed next. Covalent’s failure-analysis specialists can help semiconductor teams select and coordinate appropriate techniques and translate the resulting evidence into practical engineering action.